The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 08, 2021
Filed:
Sep. 04, 2019
Microsoft Technology Licensing, Llc, Redmond, WA (US);
Janet L. Schneider, Bellevue, WA (US);
Kenneth Reneris, Kirkland, WA (US);
Mark G. Kupferschmidt, Bothell, WA (US);
Brian L. Koehler, Woodinville, WA (US);
Adam J. Muff, Woodinville, WA (US);
Alexander L. Braun, Baltimore, MD (US);
Alison Ii, Elkridge, MD (US);
Microsoft Technology Licensing, LLC, Redmond, WA (US);
Abstract
Superconducting circuit with virtual timing elements and related methods are described. A method includes specifying a superconducting circuit portion including a timing path comprising: (1) at least one logic gate to be implemented using Josephson junctions, (2) a first virtual timing element for defining a synchronization point along the timing path, and (3) a second virtual timing element for adding latency to the timing path. The method further includes synthesizing the superconducting circuit portion, where the synthesizing comprises treating the first virtual timing element as a first flip-flop and the second virtual timing element as a second flip-flop, where the first flip-flop is treated as being fixed in relation to the at least one logic gate along the timing path, but the second flip-flop is treated as being movable in relation to the at least one logic gate along the timing path.