The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 08, 2021

Filed:

Jul. 13, 2016
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Ali Saidi, Austin, TX (US);

Prakash S. Ramrakhyani, Austin, TX (US);

Assignee:

ARM Limited, Cambridge, GB;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/0811 (2016.01); G06F 12/126 (2016.01); G06F 12/128 (2016.01); G06F 12/122 (2016.01); G06F 12/123 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0811 (2013.01); G06F 12/122 (2013.01); G06F 12/123 (2013.01); G06F 12/126 (2013.01); G06F 12/128 (2013.01); G06F 2212/1021 (2013.01); G06F 2212/60 (2013.01);
Abstract

A cache memory and method of operating a cache memory are provided. The cache memory comprises cache storage that stores cache lines for a plurality of requesters and cache control circuitry that controls insertion of a cache line into the cache storage when a memory access request from one of the plurality of requesters misses in the cache memory. The cache memory further has cache occupancy estimation circuitry that holds a count of insertions of cache lines into the cache storage for each of the plurality of requesters over a defined period. The count of cache line insertions for each requester thus provides an estimation of the cache occupancy associated with each requester.


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