The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 08, 2021
Filed:
Mar. 31, 2017
Applicant:
Platina Systems Corp., Santa Clara, CA (US);
Inventors:
Frank Szu-Jen Yang, Cupertino, CA (US);
Jason Luo Pang, Cupertino, CA (US);
Mark Tehmin Yin, Cupertino, CA (US);
Assignee:
Platina Systems Corp., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/3287 (2019.01); G06F 1/18 (2006.01); G06F 1/20 (2006.01); G06F 1/30 (2006.01); G06F 1/3296 (2019.01); G06F 13/36 (2006.01); G06F 13/40 (2006.01); H04L 12/46 (2006.01); H04L 12/723 (2013.01); H04L 29/06 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 1/183 (2013.01); G06F 1/20 (2013.01); G06F 1/305 (2013.01); G06F 1/3296 (2013.01); G06F 13/36 (2013.01); G06F 13/4068 (2013.01); H04L 12/4633 (2013.01); H04L 45/507 (2013.01); H04L 69/22 (2013.01); Y02D 10/00 (2018.01);
Abstract
In one embodiment, a system includes a number of application-specific integrated circuits (ASICs). At least one of the ASICs is configured to process incoming data packets and outgoing data packets. At least one of the ASICs is configured to move data between a respective networking module and a destination networking module. The system also includes a cable backplane having a number of parallel cables configured to transmit data between the number of ASICs.