The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 01, 2021

Filed:

Sep. 30, 2020
Applicant:

Chengdu Huawei Electronic Technology Co., Ltd., Chengdu, CN;

Inventors:

Yuanjun Cen, Chengdu, CN;

Xing Zhu, Chengdu, CN;

Jinda Yang, Chengdu, CN;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01);
U.S. Cl.
CPC ...
H03M 1/1014 (2013.01); H03M 1/10 (2013.01); H03M 1/1009 (2013.01);
Abstract

The disclosure belongs to the field of integrated circuit technologies, and particularly relates to a pipelined analog-to-digital converter capable of correcting capacitor mismatch and inter-stage gain errors. According to the disclosure, a PN code is injected into a digital domain or an analog domain of a pipelined sub-analog-to-digital converter, a mean value of codes outputted by a sub-analog-to-digital converter of an (i+1)pipeline stage in two cases that a PN code is equal to +1 and the PN code is equal to −1 is counted under the condition that a code outputted by a sub-analog-to-digital converter of an ipipeline stage is b, and a capacitor mismatch error and an actual inter-stage gain of the ipipeline stage are estimated according to the mean value and a relationship between a capacitor mismatch error and an actual inter-stage gain error of a previous pipeline stage.


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