The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 01, 2021
Filed:
Feb. 07, 2019
The Mathworks, Inc., Natick, MA (US);
Yongfeng Gu, Brookline, MA (US);
Girish Venkataramani, Cambridge, MA (US);
Wang Chen, Brookline, MA (US);
Bharathi Yogaraj, Hyderabad, IN;
Yuteng Zhou, Framingham, MA (US);
Vibha Patil, Hyderabad, IN;
Anusha Vasantala, Hyderabad, IN;
Purshottam Vishwakarma, Ashland, MA (US);
The MathWorks, Inc., Natick, MA (US);
Abstract
Systems and methods may configure a programmable logic device to efficiently run a deep learning (DL) network. Architecture code and algorithmic code may be generated. The architecture code may define convolutional and fully connected processor cores structured to run the layers of a Deep Neural Network (DNN). The processor cores may be interconnected by a First In First Out (FIFO) memory. The architecture code may also define stride-efficient memories for implementing convolution. The algorithmic code may include configuration instructions for running the DNN's layers at the processor cores. The algorithmic code may also include a schedule for executing the configuration instructions on the processor cores, for moving network parameters to the processor cores, and for transferring outputs between the layers.