The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 01, 2021

Filed:

Jan. 27, 2017
Applicants:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Ati Technologies Ulc, Markham, CA;

Inventors:

John Kalamatianos, Boxborough, MA (US);

Greg Sadowski, Boxborough, MA (US);

Syed Zohaib M. Gilani, Markham, CA;

Assignees:

ATI TECHNOLOGIES ULC, Markham, CA;

ADVANCED MICRO DEVICES, INC., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2018.01); G06F 9/30 (2018.01); G06F 15/80 (2006.01); G06F 12/0875 (2016.01);
U.S. Cl.
CPC ...
G06F 9/3836 (2013.01); G06F 9/3001 (2013.01); G06F 9/30036 (2013.01); G06F 9/383 (2013.01); G06F 9/384 (2013.01); G06F 9/3824 (2013.01); G06F 9/3851 (2013.01); G06F 9/3871 (2013.01); G06F 9/3877 (2013.01); G06F 9/3887 (2013.01); G06F 12/0875 (2013.01); G06F 15/8007 (2013.01); G06F 2212/452 (2013.01);
Abstract

A method and apparatus of asynchronous scheduling in a graphics device includes sending one or more instructions from an instruction scheduler to one or more instruction first-in/first-out (FIFO) devices. An instruction in the one or more FIFO devices is selected for execution by a single-instruction/multiple-data (SIMD) pipeline unit. It is determined whether all operands for the selected instruction are available for execution of the instruction, and if all the operands are available, the selected instruction is executed on the SIMD pipeline unit. The self-timed arithmetic pipeline unit (SIMD pipeline unit) is effectively encapsulated in a synchronous, (e.g., clocked by global clock), scheduler and register file environment.


Find Patent Forward Citations

Kalamatianos, John. (2021). Method and apparatus for asynchronous scheduling (U.S. Patent No. 11023242). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11023242

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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