The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 01, 2021

Filed:

Nov. 20, 2018
Applicant:

Seiko Epson Corporation, Tokyo, JP;

Inventor:

Kinya Matsuda, Suwa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/28 (2006.01); H02S 20/30 (2014.01); H02J 7/00 (2006.01); H02S 10/40 (2014.01); H01L 35/32 (2006.01); G06F 1/26 (2006.01); H02S 40/38 (2014.01); G06F 1/16 (2006.01); G06F 1/18 (2006.01); H01L 31/12 (2006.01); H01L 31/153 (2006.01); H01L 31/042 (2014.01);
U.S. Cl.
CPC ...
G06F 1/28 (2013.01); G06F 1/263 (2013.01); H01L 35/32 (2013.01); H02J 7/0029 (2013.01); H02J 7/0068 (2013.01); H02S 10/40 (2014.12); H02S 20/30 (2014.12); H02S 40/38 (2014.12); H02J 7/00302 (2020.01); H02J 7/00304 (2020.01); H02J 7/00306 (2020.01);
Abstract

An integrated circuit includes: a first current detection circuit configured to, when a first enable signal is in an activated state, detect a current flowing between a first node and a second node, and generate an output signal, and when the first enable signal is in a deactivated state, stop a current detection operation; a first voltage detection circuit, which operates intermittently or operates continuously, that is configured to detect a voltage at the first node, and generate an output signal; and a control circuit that is configured to generate the first enable signal and supply the first enable signal to the first current detection circuit, and is configured to fetch the output signal of the first voltage detection circuit in a period other than the period in which the first enable signal transitions from a deactivated state to an activated state.


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