The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 25, 2021

Filed:

Aug. 27, 2020
Applicant:

Nxp B.v., Eindhoven, NL;

Inventors:

Sushil Kumar Gupta, Bangalore, IN;

Pankaj Agrawal, Bangalore, IN;

Ashish Panpalia, Bangalore, IN;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/46 (2006.01); H03M 1/74 (2006.01); H03M 1/68 (2006.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
H03M 1/462 (2013.01); H03M 1/1245 (2013.01); H03M 1/68 (2013.01); H03M 1/74 (2013.01);
Abstract

A pipeline analog-to-digital converter (ADC) includes a hybrid multiplying digital-to-analog converter (MDAC) that includes multiple digital-to-analog converters (DACs), at least one conversion circuit, and at least one amplifier such that a number of conversion circuits and a number of amplifiers is less than a number of DACs. Each DAC is configured to receive an analog input signal in non-overlapping durations of a clock signal and generate a corresponding analog output signal. At least one of the conversion circuits is coupled with at least two DACs, and each conversion circuit is configured to perform conversion operation on a corresponding analog output signal to generate digital signals. At least one of the amplifiers is coupled with at least two DACs, and each amplifier is configured to perform amplification operation on a corresponding analog output signal.


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