The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 25, 2021
Filed:
Mar. 24, 2020
Cypress Semiconductor Corporation, San Jose, CA (US);
Venkataraman Prabhakar, Pleasanton, CA (US);
Krishnaswamy Ramkumar, San Jose, CA (US);
Vineet Agrawal, San Jose, CA (US);
Long Hinh, San Jose, CA (US);
Swatilekha Saha, San Jose, CA (US);
Santanu Kumar Samanta, West Bengal, IN;
Michael Amundson, Woodinville, WA (US);
Ravindra Kapre, San Jose, CA (US);
CYPRESS SEMICONDUCTOR CORPORATION, San Jose, CA (US);
Abstract
A semiconductor device that has a semiconductor-oxide-nitride-oxide-semiconductor (SONOS) based non-volatile memory (NVM) array including NVM cells arranged in rows and columns, in which NVM transistors of the NVM cells are configured to store N×analog values corresponding to the N×levels of their drain current (I) or threshold voltage (V) levels, digital-to-analog (DAC) function that receives and converts digital signals from external devices, column multiplexor (mux) function that is configured to select and combine the analog value read from the NVM cells, and analog-to-digital (ADC) function that is configured to convert analog results of the column mux function to digital values and output the digital values.