Neural network chip, method of using neural network chip to implement de-convolution operation, electronic device, and computer readable storage medium

Abstract

A neural network chip and a related product are provided. The neural network chip () includes: a memory (), a data reading/writing circuit, a convolution calculation circuit, wherein the memory is used for storing a feature map; the data reading/writing circuit is used for reading the feature map from the memory and execute an expansion and zero-padding operation on the feature according to configuration information of the feature map, and sending to the convolution calculation circuit (S); and the convolution calculation circuit is used for performing convolution calculation on the data obtained after the expansion and zero-padding operation to implement a de-convolution operation (S). The technical solution has advantages of saving memory usage and bandwidth.