The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 18, 2021

Filed:

Aug. 09, 2018
Applicant:

The Institute of Microelectronics of Chinese Academy of Sciences, Beijing, CN;

Inventors:

Nianduan Lu, Beijing, CN;

Ling Li, Beijing, CN;

Ming Liu, Beijing, CN;

Qi Liu, Beijing, CN;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/398 (2020.01); G06F 16/903 (2019.01); G06F 113/26 (2020.01); H01L 45/00 (2006.01);
U.S. Cl.
CPC ...
G06F 30/398 (2020.01); G06F 16/90335 (2019.01); G06F 2113/26 (2020.01); H01L 45/08 (2013.01);
Abstract

The disclosure provides a method and apparatus for designing a resistive random access memory, and the method comprise: receiving a preset first parameter standard of a resistive switching material, searching for and outputting a first resistive switching material based on the first parameter standard, first parameters including: band gap, charge transfer, vacancy, migration barrier, carrier activation energy. Schottky barrier and number of mesophase: establishing a resistive switching material database according to the first resistive switching materials; receiving a second parameter standard for a resistive random access memory device model, and selecting a second resistive switching material from the resistive switching material database according to the second parameter standard, second parameters including: Forming voltage, SET voltage, RESET voltage, erasing and writing speed, power consumption, storage window, stability, durability, on-off ratio, fluctuation of current parameter and storage density of the device model; and designing a resistive random access memory by using the second resistive switching material, corresponding electrode material, and a predetermined storage structure.


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