The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 18, 2021

Filed:

Oct. 12, 2018
Applicant:

Bull Sas, Les Clayes Sous Bois, FR;

Inventors:

Simon Martiel, Montrouge, FR;

Elise Rubat Ciagnus, Rouen, FR;

Assignee:

BULL SAS, Les Clayes-Sous-Bois, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/392 (2020.01); G06N 10/00 (2019.01); G06F 30/398 (2020.01); G06F 30/394 (2020.01); G06F 119/12 (2020.01);
U.S. Cl.
CPC ...
G06F 30/392 (2020.01); G06F 30/394 (2020.01); G06F 30/398 (2020.01); G06N 10/00 (2019.01); G06F 2119/12 (2020.01);
Abstract

Disclosed is a method for optimizing a quantum circuit of an ordered series of quantum gates, applied to an initial layout of qubit values, consisting in inserting a set of local SWAP gates so that all gates of the circuit are local, the method including: for each gate, if it is not local, inserting a set of local SWAP gates; determining the set of permutations, each consisting of a succession of swaps of qubit values along shortest paths between positions of qubits associated with the gate; and choosing, from the permutations, a permutation that minimizes a cost representing the number of swaps necessary to make the gates of a sequence within the series, of substantially smaller size, local; re-establishing the initial layout by establishing a tree covering a graph representative of the layout of the qubits of the circuit, and by swapping qubit values along paths of the tree.


Find Patent Forward Citations

Loading…