The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 11, 2021
Filed:
Jun. 01, 2016
Applicant:
Nitto Denko Corporation, Osaka, JP;
Inventors:
Assignee:
NITTO DENKO CORPORATION, Osaka, JP;
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 3/20 (2006.01); H05K 3/22 (2006.01); H05K 1/02 (2006.01); H05K 3/00 (2006.01); H05K 3/10 (2006.01);
U.S. Cl.
CPC ...
H05K 3/20 (2013.01); H05K 1/0283 (2013.01); H05K 3/007 (2013.01); H05K 3/22 (2013.01); H05K 3/108 (2013.01); H05K 2201/0133 (2013.01); H05K 2201/0376 (2013.01); H05K 2201/051 (2013.01); Y10T 29/49155 (2015.01);
Abstract
A method for producing a wired circuit board includes a step (1) of forming a seed layer on one surface in a thickness direction of a peeling layer, a step (2) of forming a conductive pattern on one surface in the thickness direction of the seed layer, a step (3) of covering the seed layer and the conductive pattern with an insulating layer, a step (4) of peeling the peeling layer from the seed layer, and a step (5) of removing the seed layer. The insulating layer has the number of times of folding endurance measured in conformity with JIS P8115 (2001) of 10 times or more.