The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 2021

Filed:

Oct. 31, 2018
Applicants:

John Cleaon Moore, Camarillo, CA (US);

Alexander Joseph Brewer, Camarillo, CA (US);

Jared Michael Pettit, CAmarillo, CA (US);

Alman Ximin Law, San Gabriel, CA (US);

Inventors:

John Cleaon Moore, Camarillo, CA (US);

Alexander Joseph Brewer, Camarillo, CA (US);

Jared Michael Pettit, CAmarillo, CA (US);

Alman XiMin Law, San Gabriel, CA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/683 (2006.01); B32B 17/06 (2006.01); B32B 7/12 (2006.01); B32B 37/12 (2006.01); B32B 37/18 (2006.01); H01L 21/56 (2006.01); B32B 15/02 (2006.01); B32B 37/14 (2006.01); B32B 38/18 (2006.01); B32B 37/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/6835 (2013.01); B32B 7/12 (2013.01); B32B 15/02 (2013.01); B32B 17/061 (2013.01); B32B 17/067 (2013.01); B32B 37/12 (2013.01); B32B 37/144 (2013.01); B32B 37/18 (2013.01); H01L 21/568 (2013.01); B32B 37/025 (2013.01); B32B 37/187 (2013.01); B32B 2038/1891 (2013.01); B32B 2305/026 (2013.01); B32B 2307/202 (2013.01); B32B 2457/14 (2013.01); B32B 2457/20 (2013.01); H01L 2221/68318 (2013.01); H01L 2221/68322 (2013.01); H01L 2221/68327 (2013.01); H01L 2221/68381 (2013.01);
Abstract

Compositions and designs are described for a sectional porous carrier used in processing microelectronics where thin device substrates are affixed by adhesive to the carrier and form an impervious bonded stack that is resistant to thermal and chemical products during processing and is easily handled by a substrate handling vacuum robot, and subsequently allows rapid removal (debonding) in batch operations by directional penetration into sectional porous regions by selective liquids which release the carrier from the device wafer without harm. The invention carrier with porous regions is used for temporary support of thin and fragile device substrates having capabilities of selective penetration of chemical liquids to pass through the porous regions, access and breakdown the bonding adhesive, and allow it to release without damage to the device substrate. The sectional porous nature of the carrier allows passive diffusion of chemical liquids, the manner which in contrast to mechanical, thermal, or radiative methods, is considered to be a higher yield practice and one which enables batch processing in a manufacturing environment utilizing practices of high throughput and low cost. Preferred designs include the use of porous metal forms, including laminates, as well as surface treatment of the porous regions to facilitate exclusion principles and achieve an inert support mechanism during the stages of device manufacture. These benefits allow design flexibility and low-cost batch processing when choosing practices to handle thinned device substrates in the manufacture of semiconductors and other microelectronic devices.


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