The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 2021

Filed:

Feb. 13, 2020
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Ashish Kumar Jain, Hyderabad, IN;

Saikat Bandyopadhyay, San Jose, CA (US);

Jason Villarreal, Los Gatos, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/00 (2020.01); G06F 30/33 (2020.01); G06F 9/30 (2018.01); G06F 30/3308 (2020.01); G06F 7/499 (2006.01);
U.S. Cl.
CPC ...
G06F 30/33 (2020.01); G06F 7/49942 (2013.01); G06F 9/30018 (2013.01); G06F 9/30029 (2013.01); G06F 30/3308 (2020.01);
Abstract

A method includes parsing and compiling a software code that includes a constraint bitwise operation with a first operand associated with a first constraint range and a second operand associated with a second constraint range. A first and a second plurality of ranges that spans the first and second constraint range are generated. In some embodiments, each constrained range is converted into a binary format having an upper bit portion and a lower bit portion. The upper bit portion for the each range remains unchanged. A resultant range associated with the constraint bitwise operation is determined based on performing the constraint bitwise operation on the first and the second plurality of ranges.


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