The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 2021

Filed:

Sep. 05, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Nuo Xu, Milpitas, CA (US);

Jing Wang, San Jose, CA (US);

Zhengping Jiang, San Jose, CA (US);

Woosung Choi, Pleasanton, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/18 (2006.01); G01R 31/28 (2006.01); G06F 17/14 (2006.01); G06F 7/62 (2006.01); G01R 31/317 (2006.01);
U.S. Cl.
CPC ...
G06F 17/18 (2013.01); G01R 31/2851 (2013.01); G06F 7/62 (2013.01); G06F 17/141 (2013.01); G06F 17/147 (2013.01); G01R 31/31718 (2013.01);
Abstract

A method of circuit yield analysis for evaluating rare failure events includes performing initial sampling to detect failed samples respectively located at one or more failure regions in a multi-dimensional parametric space, generating a distribution of failed samples at discrete values along each dimension, identifying the failed samples, performing a transform to project the failed samples into all dimensions in a transform space, and classifying a type of failure region for each dimension in the parametric space.


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