The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 2021

Filed:

Mar. 13, 2018
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Daiki Watanabe, Yokohama, JP;

Yuchieh Lin, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G06F 11/00 (2006.01); G11C 29/52 (2006.01); H03M 13/29 (2006.01); H03M 13/00 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 11/1012 (2013.01); G11C 29/52 (2013.01); H03M 13/2906 (2013.01); H03M 13/2909 (2013.01); H03M 13/6516 (2013.01); G11C 2029/0411 (2013.01);
Abstract

According to one embodiment, a memory system includes a nonvolatile memory, an encoding part configured to generate a plurality of component codes including a first component code and a second component code different from the first component code, by using, as an information symbol, at least one symbol of a plurality of symbols included in user data to be written into the nonvolatile memory, and a memory interface configured to write the plurality of component codes into the nonvolatile memory. The encoding part includes a plurality of encoders each configured to generate a parity corresponding to each of the plurality of component codes, and a first distributor configured to divide a first symbol string of the user data into a plurality of chunks, each of which has a first symbol length smaller than that of the first symbol string, and to input each of the plurality of chunks generated by the division, into any one of at least different two of the plurality of encoders. The memory interface is configured to write the first symbol string and parities corresponding to the first symbol string into the nonvolatile memory.


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