The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 2021

Filed:

Mar. 26, 2020
Applicant:

Molex, Llc, Lisle, IL (US);

Inventors:

Bruce Reed, Maumelle, AR (US);

Brian Keith Lloyd, Maumelle, AR (US);

Gregory Fitzgerald, Merrimack, NH (US);

Assignee:

Molex, LLC, Lisle, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R 24/60 (2011.01); G06F 1/18 (2006.01); H01R 13/514 (2006.01); H01R 13/6583 (2011.01); H05K 7/14 (2006.01); H01R 13/512 (2006.01); H01R 12/79 (2011.01);
U.S. Cl.
CPC ...
G06F 1/181 (2013.01); G06F 1/189 (2013.01); H01R 13/514 (2013.01); H01R 13/6583 (2013.01); H01R 24/60 (2013.01); H05K 7/1485 (2013.01); H05K 7/1487 (2013.01); H01R 12/79 (2013.01); H01R 13/512 (2013.01);
Abstract

A computing device includes a first connector near a first wall. The first connector is in communication with a chip package positioned apart for the first wall via a first cable. The chip package includes a chip supported by a support layer. The chip can be supported by a substrate and/or a circuit board. A second connector can be positioned near a second wall and can also be in communication with the chip package via a second cable. If desired, the substrate or circuit board can include a signal board connector that is configured to engage board connectors terminated to ends of the first and second cables.


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