The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 2021

Filed:

Jul. 23, 2018
Applicant:

Fuji Electric Co., Ltd., Kanagawa, JP;

Inventors:

Masaki Hirakata, Tokyo, JP;

Akihiro Odaka, Tokyo, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 1/08 (2006.01); H02M 7/48 (2007.01); H02M 1/32 (2007.01); H02M 7/5387 (2007.01); H03K 17/567 (2006.01); H03K 17/687 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 1/08 (2013.01); H02M 1/32 (2013.01); H02M 7/48 (2013.01); H02M 7/5387 (2013.01); H03K 17/567 (2013.01); H03K 17/687 (2013.01); H02M 2001/0006 (2013.01); H02M 2001/0009 (2013.01); H02M 2001/325 (2013.01); H03K 2217/0081 (2013.01);
Abstract

A power conversion device, that includes a drive circuitthat drives a switching elementincluded in an upper-arm for one of three phases, a drive circuitthat drives a switching elementincluded in a lower-arm for the one phase, and a control circuitthat transmits a control signal to the drive circuits, is provided. The power conversion device includes power supply circuitsthat provide power to the drive circuits, respectively, a low-voltage power supplythat supplies power to one of the power supply circuits,, and a high-voltage power supplythat supplies power to the other of the power supply circuits,. Accordingly, it is possible to reliably protect a system: by realizing minimal redundancy of the power supply, the power supply generation circuit, etc.; and by realizing the short-circuit mode at the time of error occurrence.


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