The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 2021

Filed:

Oct. 19, 2017
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Xiaobin Yuan, Cary, NC (US);

Carrie Ellen Cox, Apex, NC (US);

Joseph Natonio, Pleasant Valley, NY (US);

Siqi Fan, San Diego, CA (US);

Assignee:

QUALCOMM INCORPORATED, San Diego, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H 9/04 (2006.01); H03G 3/30 (2006.01); H04B 1/16 (2006.01); H04L 25/03 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H02H 9/045 (2013.01); H01L 27/0255 (2013.01); H01L 27/0288 (2013.01); H02H 9/046 (2013.01); H03G 3/30 (2013.01); H04B 1/16 (2013.01); H04L 25/03 (2013.01); H04L 25/03031 (2013.01); H04L 25/03057 (2013.01);
Abstract

An Electro-Static Discharge (ESD) protection circuit is disclosed. In some implementations, the ESD protection circuit includes a first ESD diode, a second ESD diode, a passive equalization network and a programmable resistor network. The first ESD diode is coupled to the passive equalization network. The programmable resistor network is coupled between the passive equalization network and the second ESD diode. The programmable resistor network can be programmed to place the ESD protection circuit in one of a plurality of receiver modes based on a type of a transmitter from which the receiver is receiving signals.


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