The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 04, 2021
Filed:
Mar. 01, 2019
Applicant:
Hamza Yilmaz, Gilroy, CA (US);
Inventor:
Hamza Yilmaz, Gilroy, CA (US);
Assignee:
IPOWER SEMICONDUCTOR, Gilroy, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/78 (2006.01); H01L 29/49 (2006.01); H01L 29/417 (2006.01); H01L 21/308 (2006.01); H01L 29/40 (2006.01); H01L 29/66 (2006.01); H01L 29/10 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7813 (2013.01); H01L 21/3086 (2013.01); H01L 29/0696 (2013.01); H01L 29/1095 (2013.01); H01L 29/407 (2013.01); H01L 29/41741 (2013.01); H01L 29/4236 (2013.01); H01L 29/495 (2013.01); H01L 29/4966 (2013.01); H01L 29/66734 (2013.01); H01L 29/7806 (2013.01);
Abstract
A MOSFET device structure is formed on a semiconductor wafer. The structure includes an array of plurality of MOS gate trenches and self-aligned p+ contact trenches that are formed in a p body region. Trench depth of MOS gate trenches are deeper than the self-aligned p+ contact trenches. P doped shield regions are formed under each MOS gate trench.