The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 2021

Filed:

Sep. 10, 2019
Applicant:

Fuji Electric Co., Ltd., Kanagawa, JP;

Inventors:

Masashi Hoya, Nagano, JP;

Katsumi Taniguchi, Nagano, JP;

Naoyuki Kanai, Nagano, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 27/06 (2006.01); H01L 23/31 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0635 (2013.01); H01L 23/3157 (2013.01); H01L 23/49822 (2013.01); H01L 23/5227 (2013.01);
Abstract

A semiconductor unit includes: a plurality of transistor chips arranged in a plurality of parallel rows, each transistor chip respectively having a first main electrode on one surface and a second main electrode on another surface; a first conductor layer electrically connected to the first main electrodes of the transistor chips, both corner portions on one end of the first conductor layer being drawn out in a direction in which the rows of transistor chips run; a second conductor layer arranged between the both corner portions of the first conductor layer; and a wiring substrate that is arranged on a side of the second main electrodes of the plurality of transistor chips and includes a wiring layer electrically connected to the second main electrodes of the plurality of transistor chips and to the second conductor layer.


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