The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 2021

Filed:

Sep. 14, 2016
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Antony John Penton, Little Canfield, GB;

Simon John Craske, Cambridge, GB;

Assignee:

ARM Limited, Cambridge, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/084 (2016.01); G06F 12/0815 (2016.01); G06F 11/00 (2006.01); G06F 12/0808 (2016.01); G06F 12/0842 (2016.01); G06F 12/0831 (2016.01); G06F 11/20 (2006.01);
U.S. Cl.
CPC ...
G06F 12/084 (2013.01); G06F 11/00 (2013.01); G06F 11/004 (2013.01); G06F 11/2043 (2013.01); G06F 12/0808 (2013.01); G06F 12/0815 (2013.01); G06F 12/0831 (2013.01); G06F 12/0842 (2013.01); G06F 2201/885 (2013.01); G06F 2212/1048 (2013.01); G06F 2212/604 (2013.01);
Abstract

An apparatus has first processing circuitry and second processing circuity. The second processing circuitry has at least one hardware mechanism providing a greater level of fault protection or fault detection than is provided for the first processing circuitry. Coherency control circuitry controls access to data from at least part of a shared address space by the first and second processing circuitry according to an asymmetric coherency protocol in which a local-only update of data in a local cache of the first processing circuitry is restricted in comparison to a local-only update of data in a local cache of the second processing circuitry.


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