The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 2021

Filed:

May. 13, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Guy L. Guthrie, Austin, TX (US);

Hien M. Le, Cedar Park, TX (US);

Hugh Shen, Round Rock, TX (US);

Derek E. Williams, Austin, TX (US);

Phillip G. Williams, Leander, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 12/0831 (2016.01); G06F 12/0862 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0831 (2013.01); G06F 12/0862 (2013.01); G06F 2212/621 (2013.01); Y02D 10/00 (2018.01);
Abstract

Statistical data is used to enable or disable snooping on a bus of a processor. A command is received via a first bus or a second bus communicably coupling processor cores and caches of chiplets on the processor. Cache logic on a chiplet determines whether or not a local cache on the chiplet can satisfy a request for data specified in the command. In response to determining that the local cache can satisfy the request for data, the cache logic updates statistical data maintained on the chiplet. The statistical data indicates a probability that the local cache can satisfy a future request for data. Based at least in part on the statistical data, the cache logic determines whether to enable or disable snooping on the second bus by the local cache.


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