The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 2021

Filed:

Feb. 17, 2020
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Joseph R. Johnson, Redwood City, CA (US);

Kenichi Ohno, Sunnyvale, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B82B 3/00 (2006.01); G01N 33/487 (2006.01); B82B 1/00 (2006.01); B81C 1/00 (2006.01);
U.S. Cl.
CPC ...
B82B 3/0019 (2013.01); B81C 1/00087 (2013.01); B82B 1/001 (2013.01); G01N 33/48721 (2013.01); B81B 2203/0127 (2013.01);
Abstract

Methods are provided for manufacturing well-controlled, solid-state nanopores and arrays of well-controlled, solid-state nanopores by a cyclic process including atomic layer deposition (ALD), or chemical vapor deposition (CVD), and etching. One or more features are formed in a thin film deposited on a topside of a substrate. A dielectric material is deposited over the substrate having the one or more features in the thin film. An etching process is then used to etch a portion of the dielectric material deposited over the substrate having the one or more features in the thin film. The dielectric material deposition and etching processes are optionally repeated to reduce the size of the features until a well-controlled nanopore is formed through the thin film on the substrate.


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