The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 2021

Filed:

Oct. 16, 2017
Applicant:

Sony Semiconductor Solutions Corporation, Kanagawa, JP;

Inventors:

Naoki Kawazu, Kanagawa, JP;

Motonobu Torii, Fukuoka, JP;

Motohashi Yuichi, Tokyo, JP;

Atsushi Suzuki, Kanagawa, JP;

Junichiro Azami, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/232 (2006.01); H04N 7/00 (2011.01); H04N 5/367 (2011.01); H04N 5/372 (2011.01); H04N 17/00 (2006.01);
U.S. Cl.
CPC ...
H04N 5/367 (2013.01); H04N 5/37213 (2013.01); H04N 17/002 (2013.01);
Abstract

A first pixel comprises a first transfer transistor, a first reset transistor, a first amplifier transistor and a first select transistor. The first transfer transistor has a first terminal coupled to a reference signal generation circuit. The first reset transistor has a first terminal coupled to the reference signal generation circuit. The first amplifier transistor has a gate coupled to a second terminal of the first reset transistor and a second terminal of the first transfer transistor. The first select transistor is coupled to the first amplifier transistor. A second pixel comprises a first photoelectric conversion element, a second transfer transistor coupled to the first photoelectric conversion element, a second reset transistor configured to receive a first predetermined voltage, a second amplifier transistor coupled to the second transfer transistor and the second reset transistor, and a second select transistor coupled to the second amplifier transistor.


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