The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 2021

Filed:

Apr. 08, 2020
Applicant:

Tdk Corporation, Tokyo, JP;

Inventor:

Lei Zou, Viken, NO;

Assignee:

TDK Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/03 (2006.01); H03K 3/011 (2006.01); H03K 3/0231 (2006.01); H03K 5/134 (2014.01); H03K 3/354 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 3/0315 (2013.01); H03K 3/011 (2013.01); H03K 3/0231 (2013.01); H03K 3/354 (2013.01); H03K 5/134 (2014.07); H03K 2005/00208 (2013.01); H03K 2005/00221 (2013.01);
Abstract

In an embodiment an oscillator device includes a ring oscillator circuit with at least one delay stage with an output of a last delay stage fed back to an input of a first delay stage, wherein each of the delay stages is configured to receive a charging current and to provide a delay that is dependent on the charging current and at least one of the delay stages includes a metal-oxide-semiconductor field-effect transistor and a bias circuit including an output terminal coupled to an input terminal of the ring oscillator circuit, wherein the bias circuit is configured to receive a temperature-independent reference voltage and includes a current source with a main NMOS-transistor, the current source configured to provide a control current to the ring oscillator circuit which is proportional to a difference of the temperature-independent reference voltage and a gate-source voltage of the main NMOS-transistor, and wherein the gate-source voltage of the main NMOS-transistor includes a negative temperature coefficient.


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