The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 2021

Filed:

Mar. 06, 2018
Applicant:

Osram Opto Semiconductors Gmbh, Regensburg, DE;

Inventors:

Norwin von Malm, Nittendorf, DE;

Andreas Plössl, Regensburg, DE;

Assignee:

OSRAM OLED GmbH, Regensburg, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2006.01); H01L 23/00 (2006.01); H01L 25/075 (2006.01); H01L 33/00 (2010.01); H01L 33/40 (2010.01); H01L 33/56 (2010.01); H01L 33/62 (2010.01); H01L 33/32 (2010.01);
U.S. Cl.
CPC ...
H01L 25/167 (2013.01); H01L 24/95 (2013.01); H01L 25/0753 (2013.01); H01L 33/0095 (2013.01); H01L 33/40 (2013.01); H01L 33/56 (2013.01); H01L 33/62 (2013.01); H01L 33/32 (2013.01); H01L 2924/01322 (2013.01); H01L 2933/005 (2013.01); H01L 2933/0066 (2013.01);
Abstract

A method of manufacturing an optoelectronic component includes: A) providing a substrate, B) providing a metallic liquid arranged in a structured manner and in direct mechanical contact on the substrate and including at least one first metal, C) providing semiconductor chips each having a metallic termination layer on their rear side, the metallic termination layer including at least one second metal different from the first metal, and D) self-organized arranging the semiconductor chips on the metallic liquid so that the first metal and the second metal form at least one intermetallic compound having a higher re-melting temperature than the melting temperature of the metallic liquid, wherein the intermetallic compound is a connecting layer between the substrate and the semiconductor chips.


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