The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 2021

Filed:

Aug. 16, 2019
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Katsuhiko Iwai, Yokohama, JP;

Shinji Maeda, Kawasaki, JP;

Takaaki Ikeda, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/42 (2006.01); G06F 11/10 (2006.01); G06F 11/00 (2006.01); G06F 11/07 (2006.01); G06F 3/06 (2006.01); G06F 12/0868 (2016.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G11C 29/42 (2013.01); G06F 11/008 (2013.01); G06F 11/0793 (2013.01); G06F 11/102 (2013.01); G06F 11/1044 (2013.01); G06F 3/0656 (2013.01); G06F 3/0688 (2013.01); G06F 11/076 (2013.01); G06F 11/0766 (2013.01); G06F 11/0787 (2013.01); G06F 12/0868 (2013.01); G06F 2212/1032 (2013.01); G06F 2212/7203 (2013.01); G11C 29/52 (2013.01);
Abstract

A memory apparatus of an embodiment includes a nonvolatile semiconductor memory device, an error correction circuit, a memory circuit, a data distribution circuit, and a processing circuit. The error correction circuit performs error detection in data read from the nonvolatile semiconductor memory device on a processing unit size basis and performs error correction on the data in response to its necessity. The memory circuit stores data on the processing unit size basis. The data distribution circuit transfers the data read from the nonvolatile semiconductor memory device to the error detection circuit and the memory circuit on the processing unit size basis. The processing circuit reads the data from the memory circuit and processes the data in response to the error correction circuit detecting an uncorrectable error in the data.


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