The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 2021

Filed:

Oct. 17, 2018
Applicant:

Samsung Electronics Co., Ltd, Suwon-si, KR;

Inventors:

Cha-Hoon Park, Seoul, KR;

Sung-Geun Joo, Suwon-si, KR;

Ga-Young Jung, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/14 (2006.01); G06F 1/16 (2006.01); G06F 3/0481 (2013.01); G06F 3/0488 (2013.01); G06F 3/0484 (2013.01);
U.S. Cl.
CPC ...
G06F 3/1423 (2013.01); G06F 1/1601 (2013.01); G06F 1/1632 (2013.01); G06F 1/1669 (2013.01); G06F 1/1692 (2013.01); G06F 3/04817 (2013.01); G06F 3/04886 (2013.01); G06F 3/1431 (2013.01); G06F 3/1454 (2013.01); G06F 3/04842 (2013.01); G06F 3/1446 (2013.01); G09G 2360/04 (2013.01); G09G 2370/12 (2013.01);
Abstract

Disclosed is an electronic device and a control method therefor. The electronic device may include a housing, a processor disposed in the housing, and at least one memory disposed in the housing, connected to the processor, and storing instructions that, when executed by the processor, cause the processor to: detect connection of a plurality of displays to the processor; determine connection types of the plurality of connected displays; display a first screen according to a first mode when all of the plurality of connected displays are internal displays that are exposed via at least a part of the housing; and display a second screen according to a second mode when some of the plurality of connected displays are internal displays and the remaining displays are external displays connected to the electronic device via an interface, a part of which is exposed via the housing.


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