The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 20, 2021

Filed:

Jul. 01, 2020
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Winson Lin, San Francisco, CA (US);

Jin Namkoong, San Jose, CA (US);

Hongtao Zhang, San Jose, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01); H04L 7/033 (2006.01); H04L 25/03 (2006.01); H03L 7/087 (2006.01); H03L 7/08 (2006.01);
U.S. Cl.
CPC ...
H03L 7/087 (2013.01); H03L 7/0807 (2013.01); H04L 7/0037 (2013.01); H04L 7/0041 (2013.01);
Abstract

An example method of clock and data recovery (CDR) includes adding a pre-defined offset to an output of a phase detector (PD) of a CDR circuit, and loading an accumulator of a frequency loop of the CDR circuit with a pre-defined load value. The method further includes detecting the phase of an incoming signal using a PD, and determining that the CDR has locked onto a real lock point. In some examples, the method further includes determining that the CDR has locked on a real lock point, and, in response to the determination, modifying the pre-defined offset to equal zero.


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