The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 20, 2021

Filed:

Feb. 03, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Si-Ho Song, Hwasung-si, KR;

Youngbae Kim, Hwasung-si, KR;

Dueung Kim, Hwasung-si, KR;

Changhyun Cho, Hwasung-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); G11C 13/00 (2006.01); H01L 45/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/249 (2013.01); G11C 13/004 (2013.01); G11C 13/0004 (2013.01); G11C 13/0007 (2013.01); G11C 13/0026 (2013.01); G11C 13/0028 (2013.01); G11C 13/0038 (2013.01); G11C 13/0097 (2013.01); H01L 27/2418 (2013.01); H01L 27/2427 (2013.01); H01L 45/06 (2013.01); H01L 45/143 (2013.01); H01L 45/144 (2013.01); H01L 45/146 (2013.01); H01L 45/147 (2013.01); G11C 2213/31 (2013.01); G11C 2213/32 (2013.01); G11C 2213/71 (2013.01);
Abstract

A nonvolatile memory device includes a memory cell array, a word line drive block that is connected to a first group of memory cells through a first group of word lines and to a second group of memory cells through a second group of word lines, a bit line bias and sense block that is connected to the first and second groups of memory cells through bit lines, a variable current supply block that generates a word line current to be supplied to a selected word line, and a control logic block that receives an address and a command and controls the variable current supply block to adjust an amount of the word line current based on the address. The control logic block further varies the amount of the word line current depending on a distance between the selected word line and the substrate.


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