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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10985045 B1

PDFFull Text
Date of Patent:
Apr. 20, 2021

Filed:

Jun. 14, 2018

Electrostatic chuck mechanism and semiconductor processing device having the same

Applicant:

Beijing Naura Microelectronics Equipment Co., Ltd, Beijing, CN;

Inventors:

Yulin Peng, Beijing, CN;

Haiying Liu, Beijing, CN;

Assignee:

BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD., Beijing, CN;

Attorney:

Anova Law Group, PLLC

Primary Examiner:

Tu B Hoang

Assistant Examiner:

Thomas J Ward

Int. Cl.
CPC ...
H01L 21/683 (2006.01); H01L 21/67 (2006.01); H01J 37/32 (2006.01); H01L 21/48 (2006.01); H01L 21/687 (2006.01); H02N 13/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/6833 (2013.01); H01J 37/32 (2013.01); H01L 21/4871 (2013.01); H01L 21/67103 (2013.01); H01L 21/67109 (2013.01); H01L 21/68721 (2013.01); H02N 13/00 (2013.01);
Abstract

An electrostatic chuck mechanism and a semiconductor processing device having the same are provided. The electrostatic chuck mechanism includes a base, an edge assembly, a main electrostatic heating layer, and an edge electrostatic heating layer. The base includes a loading surface for loading a wafer and a step surface surrounding the loading surface and located at an edge portion of the wafer. The edge assembly includes a focus ring disposed above the step surface and surrounding the loading surface, and an insulation ring disposed at a bottom of the base and supporting the base. The main electrostatic heating layer, disposed above the loading surface, is configured to secure the wafer and adjust temperature of the wafer. The edge electrostatic heating layer, disposed above the step surface, is configured to secure the focus ring and adjust temperature of the focus ring.

Find Patent Forward Citations

Peng, Yulin. (2021). Electrostatic chuck mechanism and semiconductor processing device having the same (U.S. Patent No. 10985045). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10985045

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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