The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 20, 2021

Filed:

Aug. 06, 2018
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Chengdu Boe Optoelectronics Technology Co., Ltd., Sichuan, CN;

Inventors:

Dexiong Song, Beijing, CN;

Zhiyong Yang, Beijing, CN;

Shihua Huang, Beijing, CN;

Wei He, Beijing, CN;

Jing Wang, Beijing, CN;

Liwei Huang, Beijing, CN;

Xue Jiang, Beijing, CN;

Wei Li, Beijing, CN;

Chao Fu, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/00 (2006.01); G09G 3/3258 (2016.01); G09G 3/20 (2006.01);
U.S. Cl.
CPC ...
G09G 3/006 (2013.01); G09G 3/2003 (2013.01); G09G 3/3258 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0452 (2013.01); G09G 2330/12 (2013.01);
Abstract

A test display panel is configured for application to a lighting test, and includes a plurality of reference voltage input terminals and a plurality of sub-pixels. The reference voltage input terminals are in a one-to-one correspondence to the sub-pixels. The display panel further includes a reference voltage supply circuit and a plurality of reference voltage lines. The sub-pixels include a plurality of first sub-pixels, second sub-pixels, and third sub-pixels having different colors. The reference voltage lines include a first reference voltage line, a second reference voltage line, and a third reference voltage line, each corresponding to respective sub-pixels. The reference voltage supply circuit is configured to provide reference voltages to the plurality of reference voltage lines in a time division manner. The reference voltage lines are electrically coupled to respective reference voltage input terminals of the sub-pixels.


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