The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 20, 2021

Filed:

Jun. 08, 2020
Applicant:

Marvell Asia Pte, Ltd., Singapore, SG;

Inventors:

David A. Carlson, Haslet, TX (US);

Richard E. Kessler, Northborough, MA (US);

Assignee:

MARVELL ASIA PTE, LTD., Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G06F 1/3234 (2019.01); G06F 1/28 (2006.01); G06F 1/324 (2019.01); H04L 27/00 (2006.01); H04B 17/20 (2015.01);
U.S. Cl.
CPC ...
G06F 1/26 (2013.01); G06F 1/28 (2013.01); G06F 1/324 (2013.01); G06F 1/3243 (2013.01); H04B 17/20 (2015.01); H04L 2027/0016 (2013.01); H04L 2027/0067 (2013.01); H04L 2027/0075 (2013.01); Y02D 10/00 (2018.01);
Abstract

According to at least one example embodiment, a method and corresponding apparatus for controlling power in a multi-core processor chip include: accumulating, at a controller within the multi-core processor chip, one or more power estimates associated with multiple core processors within the multi-core processor chip. A global power threshold is determined based on a cumulative power estimate, the cumulative power estimate being determined based at least in part on the one or more power estimates accumulated. The controller causes power consumption at each of the core processors to be controlled based on the determined global power threshold. The controller may directly control power consumption at the core processors or may command the core processors to do so.


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