The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 13, 2021

Filed:

Nov. 27, 2019
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Jun Hyun Park, Suwon-si, KR;

Kang Moon Jo, Hwaseong-si, KR;

Dong Woo Kim, Yongin-si, KR;

Sung Jae Moon, Seongnam-si, KR;

An Su Lee, Seoul, KR;

Woong-Sik Choi, Suwon-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/32 (2006.01); H01L 27/12 (2006.01); G09G 3/3233 (2016.01); H01L 29/786 (2006.01); G09G 3/3291 (2016.01); G09G 3/3266 (2016.01);
U.S. Cl.
CPC ...
H01L 27/3265 (2013.01); H01L 27/3248 (2013.01); H01L 27/3262 (2013.01); H01L 27/3276 (2013.01); G09G 3/3233 (2013.01); G09G 3/3266 (2013.01); G09G 3/3291 (2013.01); G09G 2310/021 (2013.01); H01L 27/124 (2013.01); H01L 27/1225 (2013.01); H01L 27/1255 (2013.01); H01L 29/7869 (2013.01);
Abstract

According to an exemplary embodiment, an organic light emitting diode display includes: a substrate; a semiconductor layer; a first gate insulating layer disposed on the oxide semiconductor layer; a first gate layer disposed on the first gate insulating layer; a first interlayer insulating layer disposed on the first gate layer; a first data layer disposed on the first interlayer insulating layer; a second interlayer insulating layer disposed on the first data layer; a driving voltage line and a driving low voltage line disposed on the second interlayer insulating layer and separated from each other; an upper insulating layer covering the driving voltage line and the driving low voltage line; and an anode disposed on the upper insulating layer and overlapping the driving voltage line or the driving low voltage line.


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