The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 13, 2021
Filed:
Jan. 28, 2017
Applicant:
Hewlett-packard Development Company, L.p., Spring, TX (US);
Inventors:
Peter Seiler, Fort Collins, CO (US);
Justin Barth, Fort Collins, CO (US);
Mark Lessman, Fort Collins, CO (US);
Assignee:
Hewlett-Packard Development Company, L.P., Spring, TX (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/38 (2006.01); G06F 1/18 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01); G06K 19/077 (2006.01);
U.S. Cl.
CPC ...
G06F 13/385 (2013.01); G06F 1/183 (2013.01); G06F 13/4022 (2013.01); G06F 13/4068 (2013.01); G06F 13/4282 (2013.01); G06K 19/07732 (2013.01); G06K 19/07733 (2013.01); G06F 2213/0024 (2013.01);
Abstract
An adaptable connector, a non-standard PCIe module, and a computer readable medium are disclosed. The adaptable connector for a PCIe interface allows for multiple standard PCIe modules and non-standard PCIe modules at different times An external I/O port has a set of non-PCIe I/O signal lanes coupled to the adaptable connector in lieu of a set of root port host PCIe signal lanes when a non-standard PCIe module is mated to the adaptable connector.