The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 13, 2021
Filed:
Nov. 20, 2018
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventor:
Jiman Hong, Gyeonggi-do, KR;
Assignee:
SK hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G11C 29/42 (2006.01); G11C 29/52 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01); G11C 7/10 (2006.01); G11C 11/56 (2006.01); G11C 8/10 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 11/1004 (2013.01); G11C 7/1039 (2013.01); G11C 11/5628 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 29/42 (2013.01); G11C 29/52 (2013.01); G11C 8/10 (2013.01); G11C 2029/0411 (2013.01); G11C 2211/5642 (2013.01);
Abstract
An operating method of memory system may include: reading target data stored in a target memory page, using a plurality of read voltages, respectively; sequentially storing read data corresponding to the target data in a plurality of latches including a first latch and a second latch, respectively; performing a first error correction code (ECC) decoding operation on first read data stored in the first latch; and performing a second ECC decoding operation on second read data stored in the second latch, when the first ECC decoding operation fails.