The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 13, 2021

Filed:

Oct. 19, 2018
Applicant:

Silicon Laboratories Inc., Austin, TX (US);

Inventors:

Patrick J. de Bakker, Hollis, NH (US);

Michael R. May, Austin, TX (US);

Assignee:

Silicon Laboratories Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/3177 (2006.01); G01R 31/317 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01); G01R 31/31701 (2013.01); G01R 31/31726 (2013.01); G01R 31/31727 (2013.01);
Abstract

A scan controller provides a translation between a two terminal external interface and a four signal line internal scan interface to a digital core of the integrated circuit. The two terminal external interface has an input terminal and an input/output terminal. The input terminal receives a clock signal and the input/output terminal serially receives a scan enable signal and a scan in data bit. A state machine controls the scan controller. The scan in data bit, the scan enable signal, and a scan clock signal are supplied in parallel to the internal scan interface. The digital logic provides a scan out data bit and the scan controller supplies the scan out data bit over the input/output terminal in synchronism with the clock signal.


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