The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 2021

Filed:

Jul. 15, 2019
Applicant:

Imec Vzw, Leuven, BE;

Inventors:

Maarten Rosmeulen, Ghent, BE;

Andreas Suss, Leuven, BE;

Assignee:

IMEC vzw, Leuven, BE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/357 (2011.01); H01L 27/146 (2006.01); H04N 5/378 (2011.01);
U.S. Cl.
CPC ...
H04N 5/3575 (2013.01); H01L 27/1464 (2013.01); H01L 27/14612 (2013.01); H01L 27/14621 (2013.01); H01L 27/14627 (2013.01); H01L 27/14636 (2013.01); H04N 5/378 (2013.01);
Abstract

A pixel architecture comprises: an absorption layer, which is configured to generate charges in response to incident light; a semiconductor charge-transport layer, which is configured to transport the generated charges through the charge-transport layer, wherein one or more doped regions are arranged in the charge-transport layer, wherein the charge-transport layer comprises a bias region and a charge-dispatch region being associated with the bias region; an electric connection connecting to and providing a selectable bias voltage to the bias region; and at least one transfer gate, wherein the doped regions and the bias region are differently biased for driving transport of the generated charges towards the charge-dispatch region, and for controlling, together with the at least one transfer gate, transfer of charges from the charge-dispatch region to a charge node.


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