The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 06, 2021
Filed:
May. 22, 2018
Microsoft Technology Licensing, Llc, Redmond, WA (US);
Christopher Chamberland, Issaquah, WA (US);
Michael E. Beverland, Seattle, WA (US);
Microsoft Technology Licensing, LLC, Redmond, WA (US);
Abstract
Fault-tolerant error correction (EC) is desirable for performing large quantum computations. In this disclosure, example fault-tolerant EC protocols are disclosed that use flag circuits, which signal when errors resulting from υ faults have weight greater than υ. Also disclosed are general constructions for these circuits (also referred to as flag qubits) for measuring arbitrary weight stabilizers. The example flag EC protocol is applicable to stabilizer codes of arbitrary distance that satisfy a set of conditions and uses fewer qubits than other schemes, such as Shor, Steane and Knill error correction. Also disclosed are examples of infinite code families that satisfy these conditions and analyze the behaviour of distance-three and -five examples numerically. Using fewer resources than Shor EC, the example flag EC protocols can be used in low-overhead fault-tolerant EC protocols using large low density parity check quantum codes.