The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 06, 2021
Filed:
Sep. 10, 2018
Applicant:
Apple Inc., Cupertino, CA (US);
Inventors:
Somnath Kundu, Hillsboro, OR (US);
Stefano Pellerano, Beaverton, OR (US);
Abhishek Agrawal, Beaverton, OR (US);
Assignee:
Apple Inc., Cupertino, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/08 (2006.01); H03L 7/087 (2006.01); H03L 7/099 (2006.01); H03L 7/113 (2006.01);
U.S. Cl.
CPC ...
H03L 7/087 (2013.01); H03L 7/0992 (2013.01); H03L 7/113 (2013.01);
Abstract
A sub-sampler phase locked loop (SSPLL) system having a frequency locking loop (FLL) and a phase locked loop (PLL) is disclosed. The FLL is configured to detect frequency variations between a phase locked loop (PLL) output signal and a reference frequency and automatically generate a pulsed correction signal upon the detected frequency variations and apply the pulsed correction signal to a voltage controlled oscillator (VCO) control voltage. The PLL is configured to generate the PLL output signal based on the VCO control voltage.