The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 2021

Filed:

Nov. 06, 2020
Applicant:

Movellus Circuits Incorporated, Ann Arbor, MI (US);

Inventors:

Chun-Ju Chou, Ann Arbor, MI (US);

Yuxiang Mu, Ann Arbor, MI (US);

Jeffrey Alan Fredenburg, Ann Arbor, MI (US);

Assignee:

Movellus Circuits, Inc., Ann Arbor, MI (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/081 (2006.01); H03L 7/091 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0816 (2013.01); H03L 7/0814 (2013.01); H03L 7/0818 (2013.01); H03L 7/091 (2013.01);
Abstract

A delay balancing circuit includes a phase detection circuit, a controller, and a delay circuit. The phase detection circuit receives a reference clock signal having a first frequency, and a feedback clock signal derived from an output clock signal. Detection circuitry detects a phase relationship between the reference clock signal and the feedback clock signal. The phase detection circuit generates a detection signal based on the detected phase relationship. The controller operates to sample the detection signal and to generate and pass an update signal to a delay line to update a delay based on the sampled value. The delay circuit receives a third clock signal and applies a delay, based on the update signal, to the third clock signal to generate the output clock signal.


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