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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10971792 B1

PDFFull Text
Date of Patent:
Apr. 06, 2021

Filed:

Apr. 12, 2017

First and second dielectric waveguides disposed in respective multi-layer substrates which are connected by a connection structure having choke structures therein

Applicant:

Mitsubishi Electric Corporation, Tokyo, JP;

Inventors:

Hideharu Yoshioka, Tokyo, JP;

Yasuo Morimoto, Tokyo, JP;

Naofumi Yoneda, Tokyo, JP;

Akimichi Hirota, Tokyo, JP;

Tomokazu Hamada, Tokyo, JP;

Tsuyoshi Hatate, Tokyo, JP;

Assignee:

MITSUBISHI ELECTRIC CORPORATION, Tokyo, JP;

Attorney:

Birch, Stewart, Kolasch & Birch, LLP

Primary Examiner:

Benny T Lee

Int. Cl.
CPC ...
H01P 5/08 (2006.01); H01P 1/04 (2006.01); H01P 1/162 (2006.01); H01P 3/16 (2006.01); H01P 5/02 (2006.01); H01P 3/12 (2006.01);
U.S. Cl.
CPC ...
H01P 5/087 (2013.01); H01P 1/042 (2013.01); H01P 1/162 (2013.01); H01P 3/121 (2013.01); H01P 3/16 (2013.01); H01P 5/024 (2013.01);
Abstract

Provided is a structure configured to electrically connect multi-layer dielectric waveguides, each including a dielectric waveguide formed of conductor patterns and vias in a laminating direction of the multi-layer dielectric substrate, in which the vias for forming part of a waveguide wall of each of the dielectric waveguides are arranged in a staggered pattern in the multi-layer dielectric substrate side having choke structures formed so as to electrically connect the waveguides to each other.

Find Patent Forward Citations

Yoshioka, Hideharu. (2021). First and second dielectric waveguides disposed in respective multi-layer substrates which are connected by a connection structure having choke structures therein (U.S. Patent No. 10971792). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10971792

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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