The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 2021

Filed:

Jun. 14, 2019
Applicant:

AU Optronics Corporation, Hsinchu, TW;

Inventors:

Chun-Feng Lin, Taichung, TW;

Chuang-Cheng Yang, Changhua County, TW;

Ming-Hsien Lee, Hsinchu, TW;

Yi-Cheng Lin, New Taipei, TW;

Wei-Chia Chiu, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/20 (2006.01);
U.S. Cl.
CPC ...
G09G 3/20 (2013.01); G09G 2300/08 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0286 (2013.01);
Abstract

A display apparatus includes a pixel array, a plurality of gate lines and a plurality of de-load lines. The pixel array includes a plurality of display rows, each of the display rows includes a plurality of pixel circuits, and each of the pixel circuits includes a first transistor and a second transistor coupled in series between a data line and a display pixel. A control end of the first transistor of each of the pixel circuits is coupled to one of the gate lines for receiving a gate driving signal. A control end of the second transistor of each of the pixel circuits is coupled to one of the de-load lines for receiving a de-loading signal. Where an enable time period of the de-loading signal received by each of the pixel circuits covers an enable time period of the gate driving signal received by each of the pixel circuits.


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