The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 2021

Filed:

Jun. 29, 2017
Applicant:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Inventors:

Jiasheng Chen, Orlando, FL (US);

Bin He, Oviedo, FL (US);

Mohammad Reza Hakami, Oviedo, FL (US);

Timothy Lottes, Orlando, FL (US);

Justin David Smith, Mission Viejo, CA (US);

Michael J. Mantor, Orlando, FL (US);

Derek Carson, San Jose, CA (US);

Assignee:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/52 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3887 (2013.01); G06F 9/30003 (2013.01); G06F 9/30032 (2013.01); G06F 9/30036 (2013.01); G06F 9/3802 (2013.01); G06F 9/3836 (2013.01); G06F 9/3851 (2013.01); G06F 9/3893 (2013.01); G06F 9/52 (2013.01);
Abstract

Systems, apparatuses, and methods for implementing a decoupled crossbar for a stream processor are disclosed. In one embodiment, a system includes at least a multi-lane execution pipeline, a vector register file, and a crossbar. The system is configured to determine if a given instruction in an instruction stream requires a permutation on data operands retrieved from the vector register file. The system conveys the data operands to the multi-lane execution pipeline on a first path which includes the crossbar responsive to determining the given instruction requires a permutation on the data operands. The crossbar then performs the necessary permutation to route the data operands to the proper processing lanes. Otherwise, the system conveys the data operands to the multi-lane execution pipeline on a second path which bypasses the crossbar responsive to determining the given instruction does not require a permutation on the input operands.


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