The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 2021
Filed:
Nov. 26, 2019
Arrcus Inc., San Jose, CA (US);
Keyur Patel, San Jose, CA (US);
Nalinaksh Pai, San Ramon, CA (US);
Randall Bush, San Jose, CA (US);
Vikram Ragukumar, Pleasanton, CA (US);
Ashutosh Shanker, Milpitas, CA (US);
Kalyani Rajaraman, San Jose, CA (US);
Robert Austein, Reading, MA (US);
Ebben Aries, Highlands Ranch, CO (US);
Lalit Kumar, Milpitas, CA (US);
Sridhar Pitchai, San Jose, CA (US);
Rajkumar Gurusamy, Fremont, CA (US);
ARRCUS INC., San Jose, CA (US);
Abstract
A logical router includes disaggregated network elements that function as a single router and that are not coupled to a common backplane. The logical router includes spine elements and leaf elements implementing a network fabric with front panel ports being defined by leaf elements. Control plane elements program the spine units and leaf to function a logical router. The control plane may define operating system interfaces mapped to front panel ports of the leaf elements and referenced by tags associated with packets traversing the logical router. Redundancy and checkpoints may be implemented for a route database implemented by the control plane elements. The logical router may include a standalone fabric and may implement label tables that are used to label packets according to egress port and path through the fabric.