The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 30, 2021

Filed:

Oct. 02, 2018
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Eskinder Hailu, Cary, NC (US);

Bupesh Pandita, Cary, NC (US);

Jon Boyette, Holly Springs, NC (US);

Hadi Goudarzi, San Diego, CA (US);

Yong Suk Jun, San Diego, CA (US);

Zhi Zhu, San Diego, CA (US);

Minhan Chen, Cary, NC (US);

Assignee:

QUALCOMM INCORPORATED, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/033 (2006.01); G04F 10/00 (2006.01); H04L 7/00 (2006.01); H03K 3/037 (2006.01); H03K 5/159 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0331 (2013.01); G04F 10/005 (2013.01); H03K 3/037 (2013.01); H03K 5/159 (2013.01); H04L 7/0037 (2013.01);
Abstract

A receiver is provided that includes a time-to-digital converter for converting a phase difference between a clock signal and a received data signal into a phase-difference digital code. The receiver also includes a logic circuit that controls a programmable delay line to delay the clock signal into a delayed clock signal by a delay that is responsive to a difference between the phase-difference code and a unit interval for the clock signal. The delayed clock signal clocks a flip-flop to register the received data signal.


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