The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 2021
Filed:
May. 07, 2020
Applicant:
Goodix Technology Inc., San Diego, CA (US);
Inventors:
Faisal Hussien, San Diego, CA (US);
Ahmed Emira, San Diego, CA (US);
Esmail Babakrpur Nalousi, San Diego, CA (US);
Assignee:
SHENZHEN GOODIX TECHNOLOGY CO., LTD., Shenzhen, CN;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/07 (2006.01); H04L 7/033 (2006.01); H03L 7/197 (2006.01); H04B 1/04 (2006.01); H04B 1/16 (2006.01);
U.S. Cl.
CPC ...
H03L 7/1974 (2013.01); H03L 7/07 (2013.01); H04B 1/04 (2013.01); H04B 1/16 (2013.01); H04L 7/0331 (2013.01);
Abstract
A clock generation circuit is disclosed. The clock generation circuit includes a first PLL circuit configured to generate a first output clock based on a first input clock, where the first PLL circuit includes a first feedback divider circuit. The clock generation circuit also includes a second PLL circuit configured to generate a second output clock based on a second input clock, where the second PLL circuit includes a second feedback divider circuit. The first input clock is generated based on the second output clock.