The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 30, 2021

Filed:

Dec. 30, 2019
Applicant:

Montage Technology Co., Ltd., Shanghai, CN;

Inventors:

Bo Qu, Shanghai, CN;

Jinfu Chen, Shanghai, CN;

Lixin Jiang, Shanghai, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/13 (2014.01); H03K 5/135 (2006.01); G06F 1/10 (2006.01); H03K 5/133 (2014.01);
U.S. Cl.
CPC ...
H03K 5/135 (2013.01); G06F 1/10 (2013.01); H03K 5/133 (2013.01);
Abstract

A delay circuit, a clock control circuit and a control method are disclosed. The delay circuit includes N-stage delay units coupled in a chain, the delay unit of each stage comprises the four-state gate circuit and an inverter circuit, an input terminal of a four-state gate circuit and an input terminal of an inverter circuit of each stage are coupled together, another input terminal of the inverter circuit is coupled to an output terminal of the inverter circuit of the next stage; an input signal is coupled to the input terminal of the four-state gate circuit and the inverter circuit of the first stage, and is output with a certain delay of time by sequentially passing through the four-state gate circuit and the inverter circuit of each stage.


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